Prototype Software Improves 3D Chip Optimization

Article excerpt

A chip design tool treats multilayer chips as one 3D structure, reducing wire length by 30% while improving performance and thermal management. Peking University’s School of Integrated Circuits has developed a prototype electronic design automation (EDA) tool designed for Huawei’s LogicFolding architecture, according to a report by the South China Morning Post. Unlike conventional chip […]