The adder at the heart of Intel’s 8087 floating-point chip

A few days ago we posted about the microcode inside the Intel 8087 floating-point chip: register exchange by Ken Shirriff. Today Ken looks into the adder at the heart of Intel’s 8087 floating-point chip.

In 1980, Intel released the Intel 8087 floating-point coprocessor, a chip that could make math up to 100 times faster. As well as arithmetic and square roots, the 8087 computed transcendental functions including tangent, exponentiation, and logarithms. But it all depended on a 69-bit adder: “The arithmetic heart of the floating-point execution unit is centered about a nanomachine comprised of the adder and its related registers, shifters and control circuitry,” as the patent describes it. In this article, I explain the circuitry of this adder.

Building a binary adder is easy; the hard part is making it fast. The key problem is how to handle the carries from a bit position to the next. Each carry potentially depends on all the lower carries, but you don’t want to wait as a carry ripples through the logic for all 69 bits. (It’s similar to doing 999999+1 with long addition: you need to carry the one, carry the one, …)

Check out the detailed analysis in the post here.